Damascene processes may be used to “build up” structures for use in a hard drive head, such as a write pole, as opposed to methods which rely upon material removal to form such 3D structures. As applied to formation of PMR writing heads, the damascene process involves forming grooves or trenches in a material, and then depositing (e.g., electroplating) a pole material into the trenches to form write poles. FIG. 1 illustrates a prior art damascene process that relies upon photoresist framing to define an area for pole plating. This process involves: 1) providing a trench with targeted angle and track width via, e.g., a reactive-ion etching (RIE); 2) depositing multiple layers of thin films including a seed (e.g., ruthenium) layer, to build a narrower trench to control the final pole shape and track width; 3) forming a framed pole layer 110 by applying a photo process (e.g., depositing and photo-developing a photoresist material) to open only the device area for the pole material plating, and then filling the trench area that the photo process has created with a pole material (e.g., CoNiFe) via a electroplating process; 4) removing the photoresist material by a photo strip or a field etch process; 5) depositing a chemical-mechanical planarization (CMP) stop layer, (e.g., diamond-like-carbon), after creating an open area on field via another photo process, followed by deposition of alumina; 6) applying a CMP process to planarize the surface on the diamond-like-carbon, while producing dishing at where no diamond-like-carbon exists; and 7) removing the DLC via, e.g., RIE.
This damascene process scheme may suffer from potential photoresist residue problems. As indicated above, to define the framed pole material layer, the area around the pole has to experience a photo process. The photo process introduces a photoresist residue which may remain on a pole side wall after the photo developing. Such photoresist residue can result in poor pole integrity and finishing. Moreover, if a sufficient amount of the photoresist residue remains at the pole bottom, device failures and/or scrapping of wafer can result. In addition, this damascene process scheme may also suffer from the complexity associated with a liftoff process to form the diamond-like-carbon. In this regard, the liftoff process may introduce undesired local topology for CMP, and may not completely remove all of the diamond-like-carbon.